HML_FwLib_STC89使用笔记（单片机课程补充资料）
【摘要】 HML_FwLib_STC89适用于Linux和Windows，并且可以直接全功能支持STC89C52RC等芯片全部功能，并非如keil4的<reg52.h>或sdcc中<8052.h>的基本功能。
先看一段示例，如下程序符合现在主流的编程规范：
/**************************************************...
HML_FwLib_STC89适用于Linux和Windows，并且可以直接全功能支持STC89C52RC等芯片全部功能，并非如keil4的<reg52.h>或sdcc中<8052.h>的基本功能。
先看一段示例，如下程序符合现在主流的编程规范：
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/*****************************************************************************
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* 头文件 *
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*****************************************************************************/
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#include "hml/hml.h"
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/*****************************************************************************
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* 初始化 *
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*****************************************************************************/
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void sys_init(void)
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{
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UART_configTypeDef uc;
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uc.baudrate = 9600;
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uc.baudGenerator = PERIPH_TIM_2;
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uc.interruptState = DISABLE;
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uc.interruptPriority = UTIL_interruptPriority_0;
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uc.mode = UART_mode_1;
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uc.multiBaudrate = DISABLE;
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uc.receiveState = ENABLE;
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UART_config(&uc);
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enableAllInterrupts();
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}
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/*****************************************************************************
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* 主函数 *
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*****************************************************************************/
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void main(void)
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{
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sys_init();
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while(true)
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{
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/* send per 1000ms */
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sleep(1000);
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UART_sendString("Welcome to Changshu Institute of Technology.\r\n");
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/* send per 1000ms */
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sleep(1000);
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UART_sendString("Let us start the MCU learning journey together.\r\n");
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}
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}
编译和下载：
- make -j
- stcgal -P stc89 output.ihx
- 或者（stcgal -P stc89 output.hex）与上面一条指令效果相同
程序功能每间隔1s，发送：
- Welcome to Changshu Institute of Technology.
- Let us start the MCU learning journey together.
使用串口工具看看效果吧：
在usr直接使用make -j编译即可使用，生成ihx和hex均可下载：
先编译：
再下载：
支持stc89系列芯片如下：
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#define MCU_MODEL_GENERIC 0x01
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#define MCU_MODEL_STC89C51RC 0x02
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#define MCU_MODEL_STC89LE51RC 0x03
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#define MCU_MODEL_STC89C52RC 0x04
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#define MCU_MODEL_STC89LE52RC 0x05
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#define MCU_MODEL_STC89C53RC 0x06
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#define MCU_MODEL_STC89LE53RC 0x07
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#define MCU_MODEL_STC89C54RDP 0x08
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#define MCU_MODEL_STC89LE54RDP 0x09
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#define MCU_MODEL_STC89C58RDP 0x0A
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#define MCU_MODEL_STC89LE58RDP 0x0B
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#define MCU_MODEL_STC89C510RDP 0x0C
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#define MCU_MODEL_STC89LE510RDP 0x0D
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#define MCU_MODEL_STC89C512RDP 0x0E
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#define MCU_MODEL_STC89LE512RDP 0x0F
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#define MCU_MODEL_STC89C514RDP 0x10
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#define MCU_MODEL_STC89LE514RDP 0x11
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#define MCU_MODEL_STC89C516RDP 0x12
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#define MCU_MODEL_STC89LE516RDP 0x13
默认为STC89C51RC，11.0592Mhz，12。
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/**
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* \brief configure clock frequency of MCU
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*/
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#ifndef __CONF_FRE_CLKIN
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#warning no specified clock frequency, HML will fill it with 11.0592MHz
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#define __CONF_FRE_CLKIN 11059200UL
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#endif
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/**
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* \brief configure prescaler of MCU
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*
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* \note in order to switch 6T/12T mode successfully, user must also do related
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* operations via select option inside official <stc-isp> software and restart
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* MCU. Otherwise, user can't observe expected phenomenon.
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*/
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#ifndef __CONF_MCU_PRESCALER
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#warning no specified MCU prescaler, HML will fill it with 12(12T mode)
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#define __CONF_MCU_PRESCALER 12
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#endif
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/**
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* \brief configure module of MCU
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*/
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#ifndef __CONF_MCU_MODEL
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#warning no specified MCU model, HML will fill it with STC89C52RC
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#define __CONF_MCU_MODEL MCU_MODEL_STC89C52RC
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#endif
GPIO直接支持0-4：
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typedef enum
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{
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PERIPH_GPIO_0 = 0x0,
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PERIPH_GPIO_1 = 0x1,
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PERIPH_GPIO_2 = 0x2,
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PERIPH_GPIO_3 = 0x3,
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PERIPH_GPIO_4 = 0x4
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} PERIPH_GPIO;
全面的寄存器信息：
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/* BYTE Register */
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__sfr __at (0x8E) AUXR ;
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__sfr __at (0xA2) AUXR1 ;
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__sfr __at (0xA9) SADDR1 ;
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__sfr __at (0xB7) IPH ;
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__sfr __at (0xC0) XICON ;
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__sfr __at (0xC8) T2CON ;
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__sfr __at (0xC9) T2MOD ;
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__sfr __at (0xCA) RCAP2L ;
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__sfr __at (0xCB) RCAP2H ;
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__sfr __at (0xCC) TL2 ;
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__sfr __at (0xCD) TH2 ;
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__sfr __at (0xE1) WDT_CONTR ;
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__sfr __at (0xE2) ISP_DATA ;
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__sfr __at (0xE3) ISP_ADDRH ;
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__sfr __at (0xE4) ISP_ADDRL ;
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__sfr __at (0xE5) ISP_CMD ;
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__sfr __at (0xE6) ISP_TRIG ;
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__sfr __at (0xE7) ISP_CONTR ;
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__sfr __at (0xE8) P4 ;
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/* BIT Register */
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/* IE */
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__sbit __at (0xAD) ET2 ;
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/* IP */
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__sbit __at (0xBD) PT2 ;
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/* P1 */
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__sbit __at (0x90) T2 ; /* AFIO */
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__sbit __at (0x91) T2EX ; /* AFIO */
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/* P4 */
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__sbit __at (0xE8) P4_0 ;
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__sbit __at (0xE9) P4_1 ;
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__sbit __at (0xEA) P4_2 ;
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__sbit __at (0xEB) P4_3 ;
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__sbit __at (0xEA) INT3 ;
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__sbit __at (0xEB) INT2 ;
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/* T2CON */
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__sbit __at (0xC8) CPRL2 ;
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__sbit __at (0xC9) T2_CT ;
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__sbit __at (0xCA) TR2 ;
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__sbit __at (0xCB) EXEN2 ;
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__sbit __at (0xCC) TCLK ;
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__sbit __at (0xCD) RCLK ;
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__sbit __at (0xCE) EXF2 ;
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__sbit __at (0xCF) TF2 ;
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/* XICON */
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__sbit __at (0xC0) IT2 ;
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__sbit __at (0xC1) IE2 ;
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__sbit __at (0xC2) EX2 ;
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__sbit __at (0xC3) PX2 ;
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__sbit __at (0xC4) IT3 ;
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__sbit __at (0xC5) IE3 ;
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__sbit __at (0xC6) EX3 ;
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__sbit __at (0xC7) PX3 ;
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/* BIT number for bits that are not directly accessible */
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/* AUXR bits */
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#define BIT_NUM_ALEOFF 0
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#define BIT_NUM_EXTRAM 1
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/* AUXR1 bits */
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#define BIT_NUM_DPS 0
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#define BIT_NUM_GF2 3
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/* IPH bits */
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#define BIT_NUM_PX0H 0
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#define BIT_NUM_PT0H 1
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#define BIT_NUM_PX1H 2
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#define BIT_NUM_PT1H 3
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#define BIT_NUM_PSH 4
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#define BIT_NUM_PT2H 5
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#define BIT_NUM_PX2H 6
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#define BIT_NUM_PX3H 7
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/* ISP_CMD bits */
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#define BIT_NUM_MS0 0
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#define BIT_NUM_MS1 1
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#define BIT_NUM_MS2 2
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/* ISP_CONTR bits */
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#define BIT_NUM_WT0 0
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#define BIT_NUM_WT1 1
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#define BIT_NUM_WT2 2
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#define BIT_NUM_SWRST 5
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#define BIT_NUM_SWBS 6
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#define BIT_NUM_ISPEN 7
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/* PCON bits */
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#define BIT_NUM_IDL 0
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#define BIT_NUM_PD 1
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#define BIT_NUM_GF0 2
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#define BIT_NUM_GF1 3
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#define BIT_NUM_POF 4
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#define BIT_NUM_SMOD0 6
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#define BIT_NUM_SMOD 7
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/* T2MOD bits */
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#define BIT_NUM_DCEN 0
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#define BIT_NUM_T2OE 1
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/* TMOD bits */
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#define BIT_NUM_T0_M0 0
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#define BIT_NUM_T0_M1 1
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#define BIT_NUM_T0_CT 2
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#define BIT_NUM_T0_GATE 3
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#define BIT_NUM_T1_M0 4
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#define BIT_NUM_T1_M1 5
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#define BIT_NUM_T1_CT 6
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#define BIT_NUM_T1_GATE 7
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/* WDT_CONTR bits */
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#define BIT_NUM_PS0 0
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#define BIT_NUM_PS1 1
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#define BIT_NUM_PS2 2
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#define BIT_NUM_IDLE_WDT 3
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#define BIT_NUM_CLR_WDT 4
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#define BIT_NUM_EN_WDT 5
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/* BIT definitions for bits that are not directly accessible */
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/* AUXR bits */
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#define ALEOFF BIT_MASK(BIT_NUM_ALEOFF)
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#define EXTRAM BIT_MASK(BIT_NUM_EXTRAM)
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/* AUXR1 bits */
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#define DPS BIT_MASK(BIT_NUM_DPS) /* DPTR register select bit */
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#define GF2 BIT_MASK(BIT_NUM_GF2)
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/* IPH bits */
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#define PX0H BIT_MASK(BIT_NUM_PX0H)
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#define PT0H BIT_MASK(BIT_NUM_PT0H)
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#define PX1H BIT_MASK(BIT_NUM_PX1H)
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#define PT1H BIT_MASK(BIT_NUM_PT1H)
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#define PSH BIT_MASK(BIT_NUM_PSH)
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#define PT2H BIT_MASK(BIT_NUM_PT2H)
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#define PX2H BIT_MASK(BIT_NUM_PX2H)
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#define PX3H BIT_MASK(BIT_NUM_PX3H)
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/* ISP_CMD bits */
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#define MS0 BIT_MASK(BIT_NUM_MS0)
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#define MS1 BIT_MASK(BIT_NUM_MS1)
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#define MS2 BIT_MASK(BIT_NUM_MS2)
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/* ISP_CONTR bits */
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#define WT0 BIT_MASK(BIT_NUM_WT0)
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#define WT1 BIT_MASK(BIT_NUM_WT1)
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#define WT2 BIT_MASK(BIT_NUM_WT2)
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#define SWRST BIT_MASK(BIT_NUM_SWRST)
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#define SWBS BIT_MASK(BIT_NUM_SWBS)
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#define ISPEN BIT_MASK(BIT_NUM_ISPEN)
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/* PCON bits */
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#define POF BIT_MASK(BIT_NUM_POF)
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#define SMOD0 BIT_MASK(BIT_NUM_SMOD0)
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/* T2MOD bits */
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#define DCEN BIT_MASK(BIT_NUM_DCEN)
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#define T2OE BIT_MASK(BIT_NUM_T2OE)
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/* WDT_CONTR bits */
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#define PS0 BIT_MASK(BIT_NUM_PS0)
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#define PS1 BIT_MASK(BIT_NUM_PS1)
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#define PS2 BIT_MASK(BIT_NUM_PS2)
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#define IDLE_WDT BIT_MASK(BIT_NUM_IDLE_WDT)
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#define CLR_WDT BIT_MASK(BIT_NUM_CLR_WDT)
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#define EN_WDT BIT_MASK(BIT_NUM_EN_WDT)
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/* Interrupt numbers: address = (number * 8) + 3 */
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#define TF2_VECTOR 5 /* 0x2b timer 2 */
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#define IE2_VECTOR 6 /* 0x33 external interrupt 2 */
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#define IE3_VECTOR 7 /* 0x3B external interrupt 3 */
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#endif
更多详细内容，参考HML_FwLib_STC89源码。
文章来源: zhangrelay.blog.csdn.net，作者：zhangrelay，版权归原作者所有，如需转载，请联系作者。
原文链接：zhangrelay.blog.csdn.net/article/details/109196577
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